1. Field of the Invention
This invention relates to a method for manufacturing bonded semiconductor bodies, and more particularly to a method for manufacturing semiconductor bodies by directly bonding silicon substrates together, or directly bonding a substrate of Si, GaAs or other semiconductor material with a substrate of the same material or different semiconductor material.
2. Description of the Related Art
With a bonded semiconductor body, pn junctions and heterojunctions, which have been considered difficult to form in the prior art can be easily formed in a short period of time. For example, in order to form a pn junction of n.sup.- -type and p.sup.- -type layers having a thickness of 50 to 100 .mu.m, the cost will be high when the conventional epitaxial method is used, and it takes as long as three to ten days if a triple diffusion method is used. However, the pn junction can be obtained in a period of as short as two hours by directly bonding the n.sup.- -type and p.sup.- -type layers together.
According to a conventional method for manufacturing the bonded semiconductor body, both the surfaces of Si substrates 1 and 2, facing at bonding interface 3, are cleaned and polished to make a mirror surface with a surface roughness (maximum height) of less than 500 .ANG.. The mirror surfaces are physically brought into contact with each other in a clean atmosphere with no dust, and then the two substrates are subjected to a heat treatment at a temperature of higher than 200.degree. C., normally at a temperature of 1100.degree. C., for two hours in an N.sub.2 gas atmosphere so as to increase the chemical bonding strength between the two substrates (Japanese Patent Disclosure 60-51700 and U.S. patent application No. 824,100 which was filed on Jan. 30, 1986 and is now abandoned).
With such a bonded semiconductor body (4), the bonding strength between the two contacted substrates prior to the heat treatment is approximately 5 kg/cm.sup.2, but the bonding strength can be increased to 100 kg/cm.sup.2 after the heat treatment. The outer surface of the bonded semiconductor body, which is different from the bonded surface, is subjected to rough polishing and finish polishing in this order, and then semiconductor elements and electrodes are formed in and on the bonded semiconductor body in the same manner as in the case of using a single semiconductor substrate.
In the above conventional method for manufacturing the bonded semiconductor body, if dust remains on the bonding surface prior to the step of contacting or adhering the two substrates, the two mirror surfaces cannot be adhered in a good contact condition and voids will occur between them. It is well known in the art that concentric interference fringes are detected around the dust when the bonded semiconductor body having such voids due to dust is observed by use of infrared topography [which is disclosed in the technical report of disclosure 85-6424 issued from the Japanese Patent Association (HATSUMEI KYOUKAI)]. Conventionally, a bonded semiconductor body (4) having the above-mentioned large bonding strength (100 kg/cm.sup.2) can be obtained in a manner in which a pair of semiconductor wafers, each having a surface roughness of less than 500 g and a total thickness variation range for the bonding areaof 5 .mu.m, are prepared, and they are contacted with each other in a clean atmosphere condition through which an interference fringe of voids due to dust is minimized.
The inventor of the present patent application has known that when bonded semiconductor body 4 obtained by the above manner is observed by infrared topography, dark portions like the surface of the moon or Mars may sometimes be observed, as is shown in FIG. 1A. However, at present, the inventor does not know anyone who has investigated the specific relation between the dark portions as shown in FIG. 1A and in defects the resultant bonded semiconductor body. This is probably because the dark portions like the surface of Mars disappear after suitable heat treatment, as is shown in FIG. 1B and, after such heat treatment, the final product of bonded semiconductor body 4 has a large bonding strength as mentioned above.
Thus, at present, no one knows what advantages can be obtained by removing the above-mentioned dark portions like the surface of Mars. Of course, no one knows how to determine the surface roughness of the semiconductor wafers in order to remove the dark portions before applying a heat treatment. In the prior art, the dark portions have not been considered as a defective factor in association with the surface roughness.
Defects in the bonded semiconductor body can be found after the final product of the bonded semiconductor body, on which many circuit elements are formed, is diced into small pieces or chips. Bonded semiconductor body 4 shown in FIG. 1B seems to be non-defective. Many circuit elements are formed on body 4 and then body 4 is diced into small chips (0.5".times.0.5 mm or 0.5 mm.quadrature.). FIG. 1C shows an example of the resultant diced body 4 (observed by photograph, not by infrared topography).
In the illustration of FIG. 1C, the vertical and horizontal lines indicate the dicing lines with pitch of 0.5 mm, and the slant lines indicate the defective portions in which parts of bonded 0.5 mm.quadrature. chips are peeled off from their bonding interfaces, as is shown in FIG. 1D. Even if such peeling off does not happen, insufficient bonding of the chips abnormally increases the electrical resistance thereof and, therefore, such chips are also defective. In critical cases, bonded semiconductor body 4 itself is cracked an broken during the process of polishing or manufacturing the device (dicing).